Methods and apparatuses for signal translation in a buffered memory
US10164817B2 · kind B2 · utility
13Cited by
9References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 21, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Mar 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, A data buffer is described. The data buffer comprises a first input/output circuit configured to receive and provide a first signal encoded according to a first communications protocol, a second input/output circuit configured to receive and provide a second signal encoded according to a second communications protocol, and a conversion circuit coupled to the first and second input/output circuits and configured to convert the first signal to the second signal and to convert the second signal to the first signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.