Patent · US Active

Approximation of resistor-capacitor circuit extraction for thread-safe design changes

US10169514B2 · kind B2 · utility

0Cited by
10References
20Claims
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Key dates

Filing dateJan 18, 2017
Grant dateJan 1, 2019
Priority date
Expiry dateMar 9, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system to design an integrated circuit and a method of fabricating an integrated circuit include performing a design change for a net among a plurality of nets of the integrated circuit. An extraction is performed for the net and includes re-computing values for a resistor-capacitor (RC) circuit representation of the net. Re-computed values resulting from the re-computing and a timestamp of the extraction are recorded. A capacitance value of a capacitor coupling the net with a neighboring net in the RC circuit representation of the neighboring net is changed to be the capacitance value of the capacitor coupling the net with the neighboring net that was re-computed for the RC circuit representation of the net. Timing and noise parameters are for the net and the neighboring net are updated to updated timing and noise parameters, and timing analysis is performed based on the updated timing and noise parameters.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.