Methods for anisotropic control of selective silicon removal
US10170336B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Aug 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31138
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present technology may include a method of etching. The method may include flowing a gas through a plasma to form plasma effluents. The method may also include reacting plasma effluents with a first layer defining a first feature. The first feature may include a first sidewall, a second sidewall, and a bottom. The first sidewall, the second sidewall, and the bottom may include the first layer. The first layer may be characterized by a first thickness on the sidewall. The method may further include forming a second layer from the reaction of the plasma effluents with the first layer. The first layer may be replaced by the second layer. The second layer may be characterized by a second thickness. The second thickness may be greater than or equal to the first thickness. The method may also include removing the second layer to expose a third layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.