Semiconductor memory device with bit line contact structure and method of forming the same
US10170362B2 · kind B2 · utility
4Cited by
1References
7Claims
0Family size
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Key dates
| Filing date | Mar 29, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Mar 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of forming a semiconductor device. First, providing a substrate, and an STI is forming in the substrate to define a plurality of active regions. Then a first etching process is performed to form a bit line contact opening, which is corresponding to one of the active regions. A second etching process is performed to remove a part of the active region and its adjacent STI so a top surface of active region is higher than a top surface of the STI. Next, a bit line contact is formed in the opening. The present invention further provides a semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.