Gate all-around semiconductor device and manufacturing method thereof
US10170378B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Apr 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Semiconductor device includes first and second nanowire structures disposed on semiconductor substrate extending in first direction on substrate. First nanowire structure includes plurality of first nanowires including first nanowire material extending along first direction and arranged in second direction, second direction substantially perpendicular to first direction. Second nanowire structure includes plurality of second nanowires including second nanowire material extending along first direction arranged in second direction. Second nanowire material is not same as first nanowire material. Each nanowire is spaced-apart from immediately adjacent nanowire. First and second gate structures wrap around first and second nanowires at first region of respective first and second nanowire structures. First and second gate structures include gate electrodes. Viewed in cross section taken along third direction substantially perpendicular to first and second directions, height of first nanowires along second direction is not equal to distance of spacing along second direction between immediately adjacent second nanowires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.