Patent · US Active

Package on package architecture and method for making

US10170409B2 · kind B2 · utility

17Cited by

1References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Sanka Ganesan · Chandler, US
John S. Guzek · Chandler, US
Nitesh Nimkar · Chandler, US
Klaus Reingruber · Langquaid, DE
Thorsten Meyer · Regensburg, DE

Key dates

Filing date	Dec 23, 2013
Grant date	Jan 1, 2019
Priority date	—
Expiry date	Dec 23, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3511
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments of the present disclosure are directed to package assemblies and methods for fabricating package assemblies. In one embodiment, a package assembly includes a die at least partially embedded in a mold compound; and a through mold via (TMV). The TMV may have vertical sides or may include two different portions with varying shapes. In some instances, prefabricated via bars may be used during fabrication. Package assemblies of the present disclosure may include package-on-package (POP) interconnects having a pitch of less than 0.3 mm. Other embodiments may be described and/or claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.