John S. Guzek
83Patents
15h-index
79Co-inventors
87Inventor score
Filing activity: Dec 19, 2001 → Sep 15, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9941245B2 | Integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate | Electricity | 232 | Active |
| US8093704B2 | Package on package using a bump-less build up layer (BBUL) package | Electricity | 63 | Active |
| US9136236B2 | Localized high density substrate routing | Electricity | 60 | Active |
| US8912670B2 | Bumpless build-up layer package including an integrated heat spreader | Electricity | 50 | Active |
| US9269701B2 | Localized high density substrate routing | Electricity | 49 | Active |
| US9153552B2 | Bumpless build-up layer package including an integrated heat spreader | Electricity | 42 | Active |
| US8264849B2 | Mold compounds in improved embedded-die coreless substrates, and processes of forming same | Emerging Cross-Sectional Technologies | 39 | Active |
| US9224674B2 | Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages | Electricity | 35 | Active |
| US8535989B2 | Embedded semiconductive chips in reconstituted wafers, and systems containing same | Electricity | 33 | Active |
| US8618652B2 | Forming functionalized carrier structures with coreless packages | Electricity | 25 | Active |
| US8313958B2 | Magnetic microelectronic device attachment | Electricity | 24 | Active |
| US8901724B2 | Semiconductor package with embedded die and its methods of fabrication | Electricity | 20 | Active |
| US7042077B2 | Integrated circuit package with low modulus layer and capacitor/interposer | Electricity | 19 | Expired |
| US10170409B2 | Package on package architecture and method for making | Electricity | 17 | Active |
| US9679843B2 | Localized high density substrate routing | Electricity | 16 | Active |
| US8035218B2 | Microelectronic package and method of manufacturing same | Electricity | 14 | Active |
| US8513792B2 | Package-on-package interconnect stiffener | Electricity | 14 | Active |
| US7851269B2 | Method of stiffening coreless package substrate | Electricity | 12 | Active |
| US8742561B2 | Recessed and embedded die coreless package | Electricity | 11 | Active |
| US9520376B2 | Bumpless build-up layer package including an integrated heat spreader | Electricity | 11 | Active |
| US9691711B2 | Method of making an electromagnetic interference shield for semiconductor chip packages | Electricity | 9 | Active |
| US8786066B2 | Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same | Electricity | 9 | Active |
| US8891246B2 | System-in-package using embedded-die coreless substrates, and processes of forming same | Electricity | 9 | Active |
| US7569471B2 | Method of providing mixed size solder bumps on a substrate using a solder delivery head | Emerging Cross-Sectional Technologies | 8 | Active |
| US9859253B1 | Integrated circuit package stack | Electricity | 8 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.