Forming long channel FinFET with short channel vertical FinFET and related integrated circuit
US10170473B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Nov 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit includes forming a FinFET by: forming a semiconductor fin on a semiconductor substrate; forming a first source/drain region in the semiconductor substrate under a first end of the semiconductor fin and a second source/drain region in the semiconductor substrate under a second, opposing end of the semiconductor fin, the second source/drain region separated from the first source/drain region by a portion of the semiconductor substrate having an opposite doping from that of the first and second source/drain region; and forming a surrounding gate extending about the semiconductor fin above the semiconductor substrate. A second vertical FinFET may be formed simultaneously. The method allows the FinFET to have a long channel extending laterally through its fin compared to the short channel of the vertical FinFET, thus creating short channel and long channel devices together without impacting vertical FinFET height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.