Method for manufacturing multi-voltage devices using high-K-metal-gate (HKMG) technology
US10177043B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2017 |
| Grant date | Jan 8, 2019 |
| Priority date | — |
| Expiry date | Oct 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
Abstract
A method for manufacturing multi-voltage devices is provided. The method includes forming a pair of logic gate stacks in a logic region of a semiconductor substrate and a pair of device gate stacks in a multi-voltage device region. The pair of logic gate stacks and the pair of device gate stacks include first dummy gate material. The pair of device gate stacks also includes a work function tuning layer. The method further includes depositing second dummy gate material over the pair of logic gate stacks. The first dummy gate material and the second dummy gate material from over a first logic gate stack of the pair of logic gate stacks are replaced with an n-type material. The first dummy gate material and the second dummy gate material from over a second logic gate stack of the pair of logic gate stacks are replaced with a p-type material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.