Patent · US Active

Integrated assemblies comprising stud-type capacitors

US10177152B1 · kind B1 · utility

2Cited by
1References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 21, 2017
Grant dateJan 8, 2019
Priority date
Expiry dateJul 21, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D1/716

Abstract

Some embodiments include an integrated capacitor assembly having a conductive pillar supported by a base, with the conductive pillar being included within a first electrode of a capacitor. The conductive pillar has a first upper surface. A dielectric liner is along an outer surface of the conductive pillar and has a second upper surface. A conductive liner is along the dielectric liner and is included within a second electrode of the capacitor. The conductive liner has a third upper surface. One of the first and third upper surfaces is above the other of the first and third upper surfaces. The second upper surface is at least as high above the base as said one of the first and third upper surfaces. Some embodiments include memory arrays having capacitors with pillar-type first electrodes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.