Patent · US Active

Method for fabricating junctions and spacers for horizontal gate all around devices

US10177227B1 · kind B1 · utility

25Cited by
1References
6Claims
0Family size

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Key dates

Filing dateAug 28, 2017
Grant dateJan 8, 2019
Priority date
Expiry dateAug 28, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/85
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides methods for forming horizontal gate-all-around (hGAA) structure devices. In one example, a method includes selectively and laterally etching a first group of sidewalls of a first layer in a multi-material layer, wherein the multi-material layer comprises repeating pairs of the first layer and a second layer, the first and the second layers having the first group and a second group of sidewalls respectively, the first group of sidewalls from the first layer exposed through openings defined in the multi-material layer and a group of inner spacers formed atop of the second group of sidewalls from the second layer, forming a recess from the first group of sidewalls of the first layer and defining a vertical wall inward from an outer vertical surface of the inner spacer formed atop of the second layers, and forming an epi-silicon layer from the recess of the first layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.