Semiconductor device with fin and related methods
US10177255B2 · kind B2 · utility
3Cited by
5References
20Claims
0Family size
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Key dates
| Filing date | Oct 2, 2017 |
| Grant date | Jan 8, 2019 |
| Priority date | — |
| Expiry date | Oct 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, and source and drain regions adjacent the channel region to generate shear and normal strain on the channel region. A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, source and drain regions adjacent the channel region, and a gate over the channel region. The fin may be canted with respect to the source and drain regions to generate shear and normal strain on the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.