Semiconductor device including a passive component formed in a redistribution layer
US10186481B2 · kind B2 · utility
1Cited by
6References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2017 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Apr 11, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/158
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a semiconductor chip, a plurality of planar metallization layers arranged over a main surface of the semiconductor chip, and a passive component including windings, wherein each of the windings is formed in one of the plurality of planar metallization layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.