Planarized interlayer dielectric with air gap isolation
US10186485B2 · kind B2 · utility
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16References
20Claims
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Key dates
| Filing date | Feb 15, 2018 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Feb 15, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.