Patent · US Active

Buried tap for a vertical transistor used with a perpendicular magnetic tunnel junction (PMTJ)

US10186551B1 · kind B1 · utility

4Cited by
5References
14Claims
0Family size

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Key dates

Filing dateJan 8, 2018
Grant dateJan 22, 2019
Priority date
Expiry dateJan 8, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/693

Abstract

In one embodiment, an apparatus includes lower electrodes positioned below a surface of a substrate, the substrate including crystalline Si, a plurality of strap regions positioned above the lower electrodes and below sets of pillars of Si, the pillars rising above the substrate, the sets of pillars being aligned in a first direction along a plane perpendicular to a film thickness direction, and the strap regions extending above a surface of the substrate, silicide junctions positioned between each of the strap regions and a corresponding lower electrode positioned therebelow, upper electrodes positioned above each of the pillars, gate dielectric layers positioned on sides of the pillars to a height greater than a lower edge of the upper electrodes, and gate layers positioned on sides of the gate dielectric layers in a second direction along the plane and perpendicular to the first direction that transverse a plurality of sets of pillars.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.