Memory cells and semiconductor devices including ferroelectric materials
US10192605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2017 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Dec 26, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/2297
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.