Preloading translation and data caches using on-chip DMA engine with fast data discard
US10198849B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Oct 26, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, apparatuses, and methods for preloading caches using a direct memory access (DMA) engine with a fast discard mode are disclosed. In one embodiment, a processor includes one or more compute units, a DMA engine, and one or more caches. When a shader program is detected in a sequence of instructions, the DMA engine is programmed to utilize a fast discard mode to prefetch the shader program from memory. By prefetching the shader program from memory, the one or more caches are populated with address translations and the shader program. Then, the DMA engine discards the shader program rather than writing the shader program to another location. Accordingly, when the shader program is invoked on the compute unit(s), the shader program and its translations are already preloaded in the cache(s).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.