Methods for selective deposition of metal silicides via atomic layer deposition cycles
US10199230B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2015 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Jul 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for selectively depositing a metal silicide layer are provided herein. In some embodiments, a method of selectively depositing a metal silicide layer includes: (a) providing a substrate having a first layer to a process chamber, wherein the first layer comprises a first surface and a feature formed in the first surface comprising an opening defined by one or more sidewalls and a bottom surface wherein the sidewalls comprise one of silicon oxide or silicon nitride and wherein the bottom surface comprises at least one of silicon or germanium; (b) exposing the substrate to a precursor gas comprising a metal halide; (c) purging the precursor gas from the process chamber using an inert gas; (d) exposing the substrate to a silicon containing gas; (e) purging the silicon containing gas from the process chamber using an inert gas; (f) repeating (b)-(e) to selectively deposit a metal silicide along the bottom surface to a predetermined thickness; and (g) annealing the substrate after depositing the metal silicide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.