Patent · US Active

Technique to share information among different cache coherency domains

US10204051B2 · kind B2 · utility

0Cited by

10References

23Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Zeev Offen · Folsom, US
Ariel Berkovits · Yuvalim, IL
Thomas A. Piazza · Loomis, US
Robert L. Farrell · Loomis, US
Altug Koker · Cameron Park, US
Opher Kahn · Haifa, IL

Key dates

Filing date	Dec 29, 2016
Grant date	Feb 12, 2019
Priority date	—
Expiry date	Dec 29, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F2213/0026
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency rules pertaining to the graphics device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.