Semiconductor chip package having a repeating footprint pattern

US10204845B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Ralf Otremba · Kaufbeuren, DE
• Amirul Afiq Hud · Melaka City, MY
• Chooi Mei Chong · Melaka City, MY
• Josef Hoeglauer · Munich, DE
• Klaus Schiess · Allensbach, DE
• Lee Shuang Wang · Melaka City, MY
• Matthias Strassburg · Erlangen, DE
• Teck Sim Lee · Melaka City, MY
• Xaver Schloegel · Sachsenkam, DE

Key dates

• Filing date: Aug 28, 2017
• Grant date: Feb 12, 2019
• Expiry date: Aug 28, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/181
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor chip package includes a semiconductor chip disposed over a main surface of a carrier. An encapsulation body encapsulates the chip. First electrical contact elements are electrically coupled to the chip and protrude out of the encapsulation body through a first side face of the encapsulation body. Second electrical contact elements are electrically coupled to the chip and protrude out of the encapsulation body through a second side face of the encapsulation body opposite the first side face. A first group of the first electrical contact elements and a second group of the first electrical contact elements are spaced apart by a distance D that is greater than a distance P between adjacent first electrical contact elements of the first group and between adjacent first electrical contact elements of the second group. The distances D and P are measured between center axes of electrical contact elements.