LDMOS transistor structures and integrated circuits including LDMOS transistor structures

US10211336B2 · kind B2 · utility

Assignee

• GlobalFoundries Singapore Pte. Ltd. · SG

Inventors

• Ming Zhu · Singapore, SG
• Shi Ya Phyllis Lim · Singapore, SG
• Pinghui Li · Singapore, SG
• Yiang Aun Nga · Singapore, SG

Key dates

• Filing date: Oct 16, 2017
• Grant date: Feb 19, 2019
• Expiry date: Oct 16, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

LDMOS transistor structures and integrated circuits including LDMOS transistor structures are provided. An exemplary integrated circuit including an LDMOS transistor structure includes a substrate including a first region and a second region. The substrate includes a bulk layer and, in the second region, an insulator layer overlying the bulk layer and a semiconductor layer overlying the insulator layer. The integrated circuit further includes a gate structure overlying the semiconductor layer. A channel region is formed in the semiconductor layer under the gate structure. The integrated circuit also includes a well contact region on the bulk layer in the first region, a source region overlying the substrate, and a drain region overlying the substrate. A drift region is located between the drain region and the gate structure.