Pulsed control line biasing in memory
US10217520B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2017 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Aug 24, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one aspect, a voltage is provided as a rectangular waveform in which the duty cycle is varied to provide different effective voltages. These voltages may be applied to various control lines in a memory device such as a word line, bit line and/or source line, in a program, verify, read or erase operation. In some cases, the duty cycle is a function of programming data of a memory cell such as an assigned data state or a programming speed category. The duty cycle could also be a function of a programming phase or other criterion. The duty cycle can be varied by modifying the duration and separation of the pulses of the waveform or by pulse counting, in which a specified number of pulses are passed in a time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.