Patent · US Active

Method for making a semiconductor device with nanowire and aligned external and internal spacers

US10217849B2 · kind B2 · utility

6Cited by

5References

14Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

Sylvain Barraud · Grenoble, FR
Emmanuel Augendre · Montbonnot-Saint-Martin, FR
Remi Coquand · Chambéry, FR
Shay Reboh · Grenoble, FR

Key dates

Filing date	Dec 11, 2017
Grant date	Feb 26, 2019
Priority date	—
Expiry date	Dec 11, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH10D86/215
WIPO fieldMicro-structural and nano-technology
WIPO sectorChemistry

Abstract

Method for making a semiconductor device, comprising:

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.