Method for providing a low-k spacer
US10224414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2016 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Dec 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3086
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming semiconductor devices with spacers is provided. SiCO spacers are formed on sides of features. Protective coverings are formed over first parts of the SiCO spacers, wherein second parts of the sidewalls of the SiCO spacers are not covered by the protective coverings. A conversion process is provided to the second parts of the SiCO spacers which are not covered by the protective coverings, which changes a physical property of the second parts of the SiCO spacers which are not covered by the protective coverings, wherein the protective coverings protects the first parts of the SiCO spacers from the conversion process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.