Patent · US Active

Achieving a small pattern placement error in metrology targets

US10228320B1 · kind B1 · utility

13Cited by
8References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 7, 2015
Grant dateMar 12, 2019
Priority date—
Expiry dateAug 1, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG03F7/70683
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

Target design methods, targets as well as scanner aberration methods and device design improvements are provided. Metrology targets may be designed by identifying at least two geometric elements in a specified device design, and designing corresponding at least two target cells of an overlay metrology target to have structures related to the at least two geometric elements. Non-printed filling elements may be added to target or device designs which exhibit large spaces (e.g., larger than twice the minimal design rule pitch) in order to avoid placement error and other inaccuracies. Scanner aberrations themselves may be measured using corresponding targets as well.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.