First read countermeasures in memory
US10229744B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2017 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Nov 17, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.