Method of redistribution layer formation for advanced packaging applications
US10229827B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2017 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Dec 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/12105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure generally describe methods of forming one or more device terminal redistribution layers using imprint lithography. The methods disclosed herein enable the formation of high aspect ratio interconnect structures at lower costs than conventional photolithography and etch processes. Further, the processes and methods described herein desirably remove, reduce, and/or substantially eliminate voids in the surrounding polymer layer formed during the polymer deposition process or subsequent thereto.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.