Chip embedding package with solderable electric contact
US10229891B2 · kind B2 · utility
0Cited by
9References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2017 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Feb 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package comprising an electronic chip, a laminate-type encapsulant at least partially encapsulating the electronic chip, a wiring structure extending from the electronic chip up to a contact pad, and a completely galvanically formed solderable exterior electric contact electrically coupled with the electronic chip by being arranged on the contact pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.