Backward compatibility by algorithm matching, disabling features, or throttling performance
US10235219B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2015 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | Jul 27, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A new device executing an application on a new CPU determines whether the application is for a legacy device having a legacy CPU. When the application is for the legacy device, the new CPU executes the application with selected features of the new CPU that are not present on the legacy CPU disabled, or with a latency of instruction execution of the new CPUs altered to match or approximate a latency of the legacy CPU, or with algorithmic details of operation of one or more units of the new CPU altered to match or approximate algorithmic details of operation of corresponding units of the legacy CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.