Semiconductor chip and method for forming a chip pad
US10236265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2014 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | Jan 11, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip with different chip pads and a method for forming a semiconductor chip with different chip pads are disclosed. In some embodiments, the method comprises depositing a barrier layer over a chip front side, depositing a copper layer after depositing the barrier layer, and removing a part of the copper layer located outside a first chip pad region, wherein a remaining portion of the copper layer within the first chip pad region forms a surface layer of the chip pad. The method further comprises removing a part of the barrier layer located outside the first chip pad region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.