Compute optimizations for low precision machine learning operations
US10242423B2 · kind B2 · utility
7Cited by
3References
16Claims
0Family size
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Key dates
| Filing date | Oct 20, 2017 |
| Grant date | Mar 26, 2019 |
| Priority date | — |
| Expiry date | Oct 20, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment provides an accelerator module comprising a memory stack including multiple memory dies; a graphics processing unit (GPU) coupled with the memory stack via one or more memory controllers, the GPU including a plurality of multiprocessors having a single instruction, multiple thread (SIMT) architecture, the multiprocessors to execute at least one single instruction; the at least one single instruction to cause at least a portion of the GPU to perform a floating-point operation on input having differing precisions; and the floating-point operation is a two-dimensional matrix multiply and accumulate operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.