Joydeep Ray
497Patents
15h-index
304Co-inventors
85Inventor score
Filing activity: Dec 28, 2012 → May 22, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10474458B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 40 | Active |
| US10353706B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 40 | Active |
| US11113784B2 | Sparse optimizations for a matrix accelerator architecture | Physics | 36 | Active |
| US11080046B2 | Instructions and logic to perform floating point and integer operations for machine learning | Physics | 33 | Active |
| US11360767B2 | Instructions and logic to perform floating point and integer operations for machine learning | Physics | 33 | Active |
| US10409614B2 | Instructions having support for floating point and integer data types in the same register | Emerging Cross-Sectional Technologies | 33 | Active |
| US11620256B2 | Systems and methods for improving cache efficiency and utilization | Physics | 32 | Active |
| US11461107B2 | Compute unit having independent data paths | Emerging Cross-Sectional Technologies | 31 | Active |
| US11409537B2 | Mixed inference using low and high precision | Emerging Cross-Sectional Technologies | 31 | Active |
| US11169799B2 | Instructions and logic to perform floating-point and integer operations for machine learning | Physics | 31 | Active |
| US10817042B2 | Power savings for neural network architecture with zero activations during inference | Emerging Cross-Sectional Technologies | 29 | Active |
| US10304154B2 | Coordination and increased utilization of graphics processors during inference | Emerging Cross-Sectional Technologies | 29 | Active |
| US10108850B1 | Recognition, reidentification and security enhancements using autonomous machines | Physics | 27 | Active |
| US10380039B2 | Apparatus and method for memory management in a graphics processing environment | Physics | 17 | Active |
| US10332320B2 | Autonomous vehicle advanced sensing and response | Emerging Cross-Sectional Technologies | 16 | Active |
| US10043232B1 | Compute cluster preemption within a general-purpose graphics processing unit | Emerging Cross-Sectional Technologies | 13 | Active |
| US10546393B2 | Compression in machine learning and deep learning processing | Physics | 13 | Active |
| US10109039B1 | Display engine surface blending and adaptive texel to pixel ratio sample rate system, apparatus and method | Physics | 10 | Active |
| US10282811B2 | Apparatus and method for managing data bias in a graphics processing architecture | Physics | 10 | Active |
| US10401954B2 | Sensory enhanced augmented reality and virtual reality device | Physics | 10 | Active |
| US9600413B2 | Common platform for one-level memory architecture and two-level memory architecture | Physics | 9 | Active |
| US10102149B1 | Replacement policies for a hybrid hierarchical cache | Physics | 7 | Active |
| US10242423B2 | Compute optimizations for low precision machine learning operations | Emerging Cross-Sectional Technologies | 7 | Active |
| US10290141B2 | Cloud based distributed single game calculation of shared computational work for multiple cloud gaming client devices | Human Necessities | 6 | Active |
| US10423415B2 | Hierarchical general register file (GRF) for execution block | Emerging Cross-Sectional Technologies | 6 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.