Patent · US Active

Memory arrays, and methods of forming memory arrays

US10242726B1 · kind B1 · utility

1Cited by
9References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 5, 2018
Grant dateMar 26, 2019
Priority date
Expiry dateNov 5, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/315
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Some embodiments include an assembly having active material structures arranged in an array having rows and columns. Each of the active material structures has a first side which includes a bit contact region, and has a second side which includes a cell contact region. Each of the bit contact regions is coupled with a first redistribution pad. Each of the cell contact regions is coupled with a second redistribution pad. The first redistribution pads are coupled with bitlines, and the second redistribution pads are coupled with programmable devices. Some embodiments include methods of forming memory arrays.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.