Etching method
US10249510B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 28, 2018 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Feb 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/308
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An etching method including the following steps is provided. A substrate is provided first. A first region and a second region adjacent to the first region are defined on the substrate. A material layer is formed on the substrate. A pattern mask is formed on the material layer. The patterned mask includes a first part covering the material layer on the first region and a second part including a lattice structure. The lattice structure includes a plurality of openings and a plurality of shielding parts. Each opening exposes a part of the material layer on the second region. Each shielding part is located between the openings adjacent to one another. Each shielding part covers a part of the material layer on the second region. An isotropic etching process is then performed to remove the material layer exposed by the openings and the material layer covered by the shielding parts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.