Patent · US Active

Test cell for laminate and method

US10249548B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 15, 2017
Grant dateApr 2, 2019
Priority date
Expiry dateNov 15, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A laminate includes a plurality of buildup layers disposed on a core and a plurality of unit cells defined in the buildup layers. Each unit cell includes: at least one test via that passes through at least two of the buildup layers and that is electrically connected to testing locations on a probe accessible location of the laminate; and two or more dummy vias disposed in the unit cell. The dummy vias are arranged in the unit cell at one of a plurality of distances from the test via.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.