Disaggregated memory appliance having a management processor that accepts request from a plurality of hosts for management, configuration and provisioning of memory
US10254987B2 · kind B2 · utility
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4References
13Claims
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Key dates
| Filing date | Sep 28, 2015 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Sep 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example embodiments provide a disaggregated memory appliance, comprising: a plurality of leaf memory switches that manage one or more memory channels of one or more of leaf memory modules; a low-latency memory switch that arbitrarily connects one or more external processors to the plurality of leaf memory modules over a host link; and a management processor that responds to requests from one or more external processors for management, maintenance, configuration and provisioning of the leaf memory modules within the memory appliance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.