Dynamic termination scheme for memory communication
US10255220B2 · kind B2 · utility
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9References
18Claims
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Key dates
| Filing date | Feb 23, 2016 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Dec 22, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and method for dynamic termination control to enable use of an increased number of memory modules on a single channel. In some embodiments, six or eight DIMMs are coupled to a single channel. The dynamic termination scheme can include configurations for input bus termination (IBT) on each of the memory modules for the address bus/command bus and configurations for on-die termination (ODT) one each of the memory modules for the data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.