ReRAM read state verification based on cell turn-on characteristics
US10256402B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2017 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Sep 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/823
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a resistive memory device includes providing a resistive memory device including an array of resistive memory cells, where each of the resistive memory cells includes a resistive memory material having at least two different resistive states, performing a first mode read operation on a group of resistive memory cells within the array, determining a bit error rate for data generated by the first mode read operation, determining whether the determined bit error rate is below a predetermined limit, and performing a second mode read operation on the group of resistive memory cells within the array based on a threshold voltage if the determined bit error rate is above the predetermined limit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.