Semiconductor structures including liners and related methods

US10256406B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Dale W. Collins · Boise, US
• Andrea Gotti · Vaprio d'Adda, IT
• F. Daniel Gealy · Kuna, US
• Tuman Earl Allen, III · Kuna, US
• Swapnil Lengade · Boise, US

Key dates

• Filing date: May 16, 2016
• Grant date: Apr 9, 2019
• Expiry date: May 16, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8828

Abstract

A semiconductor structure includes a plurality of stack structures overlying a substrate. Each stack structure includes a first chalcogenide material over a conductive material overlying the substrate, an electrode over the first chalcogenide material, a second chalcogenide material over the electrode, a liner on sidewalls of at least one of the first chalcogenide material or the second chalcogenide material, and a dielectric material over and in contact with sidewalls of the electrode and in contact with the liner. Related semiconductor devices and systems, methods of forming the semiconductor structure, semiconductor device, and systems, and methods of forming the liner in situ are disclosed.