Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration
US10276434B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2018 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Jan 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods to fabricate the devices are provided. For example, a semiconductor device includes a back-end-of-line (BEOL) structure formed on a semiconductor substrate. The BEOL structure further includes at least one metallization layer comprising a pattern of elongated parallel metal lines. The pattern of elongated metal lines comprises a plurality of metal lines having a minimum width and at least one wider metal line having a width which is greater than the minimum width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.