Yann Mignot
120Patents
8h-index
110Co-inventors
79Inventor score
Filing activity: Jul 25, 2013 → Sep 16, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10020254B1 | Integration of super via structure in BEOL | Electricity | 25 | Active |
| US8927442B1 | SiCOH hardmask with graded transition layers | Electricity | 24 | Active |
| US10020255B1 | Integration of super via structure in BEOL | Electricity | 18 | Active |
| US9385078B1 | Self aligned via in integrated circuit | Electricity | 11 | Active |
| US10157789B2 | Via formation using sidewall image transfer process to define lateral dimension | Electricity | 10 | Active |
| US10304744B1 | Inverse tone direct print EUV lithography enabled by selective material deposition | Electricity | 9 | Active |
| US9984919B1 | Inverted damascene interconnect structures | Electricity | 9 | Active |
| US9390967B2 | Method for residue-free block pattern transfer onto metal interconnects for air gap formation | Electricity | 8 | Active |
| US9779944B1 | Method and structure for cut material selection | Electricity | 8 | Active |
| US9490168B1 | Via formation using sidewall image transfer process to define lateral dimension | Electricity | 8 | Active |
| US9373582B1 | Self aligned via in integrated circuit | Electricity | 7 | Active |
| US9466563B2 | Interconnect structure for an integrated circuit and method of fabricating an interconnect structure | Electricity | 6 | Active |
| US10103022B2 | Alternating hardmasks for tight-pitch line formation | Emerging Cross-Sectional Technologies | 6 | Active |
| US10361129B1 | Self-aligned double patterning formed fincut | Electricity | 6 | Active |
| US10658180B1 | EUV pattern transfer with ion implantation and reduced impact of resist residue | Electricity | 5 | Active |
| US9679899B2 | Co-integration of tensile silicon and compressive silicon germanium | Electricity | 4 | Active |
| US10586732B2 | Via cleaning to reduce resistance | Electricity | 4 | Active |
| US9214429B2 | Trench interconnect having reduced fringe capacitance | Electricity | 4 | Active |
| US10622301B2 | Method of forming a straight via profile with precise critical dimension control | Electricity | 4 | Active |
| US9837351B1 | Avoiding gate metal via shorting to source or drain contacts | Electricity | 3 | Active |
| US10410875B2 | Alternating hardmasks for tight-pitch line formation | Electricity | 3 | Active |
| US10672705B2 | Method of forming a straight via profile with precise critical dimension control | Electricity | 3 | Active |
| US10361125B2 | Methods and structures for forming uniform fins when using hardmask patterns | Electricity | 3 | Active |
| US10032632B2 | Selective gas etching for self-aligned pattern transfer | Electricity | 3 | Active |
| US10276434B1 | Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.