Patent · US Active

Reduction of solder interconnect stress

US10276534B2 · kind B2 · utility

1Cited by
12References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 8, 2017
Grant dateApr 30, 2019
Priority date
Expiry dateAug 8, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3512
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A first electrical contact and second contact is upon an interposer and/or upon a processing device. The first contact includes a minor axis and a major axis. The second contact includes diameter axes. The first contact is positioned such that the major axis is generally aligned with the direction of expansion of the interposer and/or the processing device. The first electrical contact may further be positioned within a power/ground or input/output (I/O) region of the interposer and/or processing device. The first electrical contact may further be positioned within a center region that is surrounded by a perimeter region of the interposer and/or the processing device. The dimensions or aspect ratios of major and minor axes of neighboring first electrical contacts within an electrical contact grid may differ relative thereto. Further, the angle of respective major and minor axes of neighboring first electrical contacts within the electrical contact grid may differ relative thereto.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.