Anson J. Call
31Patents
10h-index
57Co-inventors
78Inventor score
Filing activity: Jul 18, 1990 → Aug 22, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5060844A | Interconnection structure and test method | Emerging Cross-Sectional Technologies | 143 | Expired |
| US5147084A | Interconnection structure and test method | Emerging Cross-Sectional Technologies | 137 | Expired |
| US5471027A | Method for forming chip carrier with a single protective encapsulant | Emerging Cross-Sectional Technologies | 94 | Expired |
| US5533256A | Method for directly joining a chip to a heat sink | Emerging Cross-Sectional Technologies | 63 | Expired |
| US6333563A | Electrical interconnection package and method thereof | Electricity | 49 | Expired |
| US5659203A | Reworkable polymer chip encapsulant | Electricity | 48 | Expired |
| US6297559A | Structure, materials, and applications of ball grid array interconnections | Emerging Cross-Sectional Technologies | 33 | Expired |
| US5930597A | Reworkable polymer chip encapsulant | Electricity | 26 | Expired |
| US6300164A | Structure, materials, and methods for socketable ball grid | Emerging Cross-Sectional Technologies | 23 | Expired |
| US6120885A | Structure, materials, and methods for socketable ball grid | Emerging Cross-Sectional Technologies | 14 | Expired |
| US6218629A | Module with metal-ion matrix induced dendrites for interconnection | Emerging Cross-Sectional Technologies | 6 | Expired |
| US9105535B2 | Copper feature design for warpage control of substrates | Electricity | 5 | Active |
| US5955543A | Aryl cyanate and/or diepoxide and hydroxymethylated phenolic or hydroxystyrene resin | Electricity | 5 | Expired |
| US9659131B2 | Copper feature design for warpage control of substrates | Electricity | 3 | Active |
| US5759285A | Method and solution for cleaning solder connections of electronic components | Electricity | 3 | Expired |
| US6114450A | Aryl Cyanate and/or diepoxide and tetrahydropyranyl-protected hydroxymethylated phenolic or hydroxystyrene resin | Electricity | 2 | Expired |
| US6584684B2 | Method for assembling a carrier and a semiconductor device | Emerging Cross-Sectional Technologies | 1 | Expired |
| US9633914B2 | Split ball grid array pad for multi-chip modules | Electricity | 1 | Active |
| US9563732B1 | In-plane copper imbalance for warpage prediction | Physics | 1 | Active |
| US9865557B1 | Reduction of solder interconnect stress | Electricity | 1 | Active |
| US10276534B2 | Reduction of solder interconnect stress | Electricity | 1 | Active |
| US7786579B2 | Apparatus for crack prevention in integrated circuit packages | Electricity | 1 | Active |
| US10956649B2 | Semiconductor package metal shadowing checks | Physics | 0 | Active |
| US10706204B2 | Automated generation of surface-mount package design | Physics | 0 | Active |
| US10483233B2 | Split ball grid array pad for multi-chip modules | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.