Method for 3D ink jet TCB interconnect control
US10276539B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Oct 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.