CMOS image sensor including superlattice to enhance infrared light absorption
US10276625B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Dec 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8063
Abstract
A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a plurality of laterally adjacent infrared (IR) photodiode structures on the substrate. Each IR photodiode structure may include a superlattice on the semiconductor substrate including a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Further, the superlattice may have the first conductivity type. The CMOS image sensor may further include a semiconductor layer on the superlattice, a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.