Marek Hytha
69Patents
35h-index
14Co-inventors
85Inventor score
Filing activity: Aug 22, 2003 → Jun 20, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6830964B1 | Method for making semiconductor device including band-engineered superlattice | Electricity | 121 | Expired |
| US6833294B1 | Method for making semiconductor device including band-engineered superlattice | Electricity | 119 | Expired |
| US7517702B2 | Method for making an electronic device including a poled superlattice having a net electrical dipole moment | Electricity | 117 | Active |
| US6897472B2 | Semiconductor device including MOSFET having band-engineered superlattice | Electricity | 116 | Expired |
| US7446002B2 | Method for making a semiconductor device comprising a superlattice dielectric interface layer | Electricity | 115 | Expired |
| US6891188B2 | Semiconductor device including band-engineered superlattice | Electricity | 111 | Expired |
| US7625767B2 | Methods of making spintronic devices with constrained spintronic dopant | Electricity | 110 | Active |
| US7034329B2 | Semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure | Electricity | 109 | Expired |
| US6927413B2 | Semiconductor device including band-engineered superlattice | Electricity | 109 | Expired |
| US6878576B1 | Method for making semiconductor device including band-engineered superlattice | Electricity | 109 | Expired |
| US7700447B2 | Method for making a semiconductor device comprising a lattice matching layer | Electricity | 109 | Active |
| US7880161B2 | Multiple-wavelength opto-electronic device including a superlattice | Emerging Cross-Sectional Technologies | 109 | Active |
| US6958486B2 | Semiconductor device including band-engineered superlattice | Electricity | 109 | Expired |
| US7153763B2 | Method for making a semiconductor device including band-engineered superlattice using intermediate annealing | Emerging Cross-Sectional Technologies | 109 | Expired |
| US7071119B2 | Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure | Electricity | 108 | Expired |
| US6952018B2 | Semiconductor device including band-engineered superlattice | Electricity | 108 | Expired |
| US7033437B2 | Method for making semiconductor device including band-engineered superlattice | Electricity | 107 | Expired |
| US7265002B2 | Method for making a semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel | Electricity | 107 | Expired |
| US7435988B2 | Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel | Electricity | 107 | Expired |
| US7303948B2 | Semiconductor device including MOSFET having band-engineered superlattice | Electricity | 107 | Expired |
| US8389974B2 | Multiple-wavelength opto-electronic device including a superlattice | Emerging Cross-Sectional Technologies | 106 | Active |
| US7863066B2 | Method for making a multiple-wavelength opto-electronic device including a superlattice | Emerging Cross-Sectional Technologies | 106 | Active |
| US7718996B2 | Semiconductor device comprising a lattice matching layer | Electricity | 106 | Active |
| US10109479B1 | Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice | Electricity | 65 | Active |
| US10170603B2 | Semiconductor device including a resonant tunneling diode structure with electron mean free path control layers | Electricity | 57 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.