Patent · US Active

Semiconductor wafer comprising a monocrystalline group-IIIA nitride layer

US10283356B2 · kind B2 · utility

4Cited by

0References

22Claims

0Family size

Assignee

Siltronic AG · DE

Inventors

Sarad Bahadur Thapa · Burghausen, DE
Maik Haeberlen · Burghausen, DE
Marvin Zoellner · Frankfurt (Oder), DE
Thomas Schroeder · Berlin, DE

Key dates

Filing date	Jan 15, 2016
Grant date	May 7, 2019
Priority date	—
Expiry date	Jan 19, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/82
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.