Semiconductor device including conductive bump interconnections
US10283485B2 · kind B2 · utility
0Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2017 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Jun 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is disclosed including semiconductor die stacked in a stepped, offset configuration, where die bond pads of semiconductor die on different levels are interconnected using one or more conductive bumps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.