Non-volatile memory
US10283511B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2017 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Mar 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory including memory cells is provided. Each of the memory cells includes a substrate, a floating gate structure, a select gate structure, and a first doped region. The floating gate structure is disposed on the substrate. The select gate structure is disposed on the substrate and located at one side of the floating gate structure. The first doped region is disposed in the substrate at another side of the floating gate structure. The first doped regions between two adjacent memory cells are adjacent to one another and separated from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.