Semiconductor device
US10283647B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2017 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Aug 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor device includes an interconnection layer, a stacked body, a plurality of separation portions, a semiconductor body, a charge storage portion, an n-type semiconductor region, and a p-type semiconductor region. The n-type semiconductor region is provided between the separation portion and the first interconnection part, and has contact with the first interconnection part and the second semiconductor part. The p-type semiconductor region is provided between the separation portion and the second interconnection part, and has contact with the second interconnection part and the second semiconductor part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.